1. Field of the Invention
This invention generally relates to electronic devices. More particularly, a digital logic voltage level shifter with user-definable voltage levels is presented.
2. Description of the Related Art
The majority of digital devices today employ voltage-sensitive binary logic. In binary logic devices, one voltage level represents a logic `0` or `low` while a different voltage level represents a logic `1` or `high`. In positive logic, the lower voltage level represents the logic `0` and the higher voltage level represents a logic `1`. In negative logic, the reverse is true. Typically, the minimum output drive voltage levels exceed the maximum input switching threshold voltage levels by some minimum amount to guarantee error-free operation in the presence of noise and part-to-part variation.
Digital logic devices are fabricated from various materials, such as silicon (Si), germanium (Ge) and gallium arsenide (GaAs), using different process technologies. Typically, each digital logic device is designed to operate around a fixed set of input switching threshold and output drive voltage levels. These voltage levels are determined by design and by the particular combination of materials and process technology used to fabricate that device. To accommodate the large number of possible materials and process technology combinations, several different sets of logic voltage levels have been standardized. Devices constructed from similar materials and process technologies that operate to the same set of input switching threshold and output drive voltage levels are referred to as a logic family, such as 5.0 volt and 3.3 volt CMOS and TTL. The number and type of digital logic families are continuously changing in response to both changing technologies and market demands.
Often, digital devices from different logic families must communicate with each other. Unfortunately, the logic voltage levels of different logic families are often incompatible with each other. Directly connecting devices from different logic families can result in unreliable or even non-functional interfaces. It shall also be noted that newer components of a logic family are sometimes not compatible with the older components.
A few logic level shifters have been designed to interface devices from dissimilar logic families, but each is designed for a single specific interface (e.g. 3.3 volt and 5.0 volt CMOS). With the ever-changing and growing number of logic families on the market today, fixed logic level shifters cannot hope to keep up with the number of possible logic family interface requirements. A design that mixes two or more dissimilar logic families can require several different logic level shifters to satisfy all interface requirements. Unfortunately, this increases the number of part types, the total part count and system cost.
When a large number of devices are connected together on a single net, such as multiple boards connected across a backplane, the capacitance of that net becomes considerable. The amount of power necessary to drive digital data across any net is a function of the total net capacitance, the data switching frequency and the difference between the high and low logic voltage levels. Transceivers are high-drive bi-directional logic buffer devices that are typically used to drive large nets and to buffer other devices from those nets. Some transceiver devices also act as level shifters in that they provide a standard full-swing logic interface on the low-capacitance daughterboard side and a special reduced-swing logic interface on the high-capacitance backplane side. This is done to reduce the power necessary to transmit data across the backplane. Several different sets of reduced swing backplane voltage levels have been standardized. Table 1 lists the logic voltage levels of some standard reduced-swing backplane voltage specifications. Like the low-drive level shifters, each of these high-drive level shifters is designed for a single specific interface, such as 5.0 volt TTL on the board side to BTL on the backplane side. Unfortunately, these devices are too specific to be used for more than a single specific interface.
TABLE 1 ______________________________________ Standard Reduced-Swing Backplane Logic Voltage Levels Input Threshold Output Drive Backplane Voltage Voltage Specification Levels Levels Name VIL VIH VOL VOH ______________________________________ Backplane Transceiver Logic (BTL) 1.475 1.625 1.100 2.100 Center-Tapped Termination (CTT) 1.300 1.700 1.100 1.900 Enhanced Transceiver Logic (ETL) 1.400 1.600 0.400 2.400 Gunning Transceiver Logic (GTL) 0.750 0.850 0.400 1.200 Kuo Transceiver Logic (KTL) 0.950 1.050 0.600 1.400 Lipp Transceiver Logic (LTL) 1.700 2.100 0.000 3.300 Low Voltage Swing CMOS (LVSC) 0.475 1.625 1.100 2.100 Low Voltage TTL (LVTTL) 0.800 2.000 0.400 2.400 ______________________________________